10th Annual Conference of the International Speech Communication Association

Brighton, United Kingdom
September 6-10, 2009

Parallelized Viterbi Processor for 5,000-Word Large-Vocabulary Real-Time Continuous Speech Recognition FPGA System

Tsuyoshi Fujinaga, Kazuo Miura, Hiroki Noguchi, Hiroshi Kawaguchi, Masahiko Yoshimoto

Kobe University, Japan

We propose a novel Viterbi processor for the large vocabulary real-time continuous speech recognition. This processor is built with multi Viterbi cores. Since each core can independently compute, these cores reduce the cycle times very efficiently. To verify the effect of utilizing multi cores, we implement a dual-core Viterbi processor in an FPGA and achieve 49% cycle-time reduction, compared to a single-core processor. Our proposed dual-core Viterbi processor achieves the 5,000-word real-time continuous speech recognition at 65.175 MHz. In addition, it is easy to implement scalable increases in the number of cores, which leads to achievement of the larger vocabulary.

Full Paper

Bibliographic reference.  Fujinaga, Tsuyoshi / Miura, Kazuo / Noguchi, Hiroki / Kawaguchi, Hiroshi / Yoshimoto, Masahiko (2009): "Parallelized viterbi processor for 5,000-word large-vocabulary real-time continuous speech recognition FPGA system", In INTERSPEECH-2009, 1483-1486.