Third International Conference on Spoken Language Processing (ICSLP 94)

Yokohama, Japan
September 18-22, 1994

VLSI Implementation of a Robust Hybrid Parameter-Extractor and Neural Network for Speech Decoding

Victoria Rodellar, Antonio Diaz, Jose Gallardo, Virginia Peinado, Victor Nieto, Pedro Gomez

Departamento de Arquitectura y Tecnologia de Sistemas Informaticos, Universidad Politecnica de Madrid, Madrid, Spain

Through the present paper, the design and VLSI integration of an Application-Specific Inner-Product Processor is illustrated. This processor is especially suited to support Adaptive Parameter Extracting Algorithms and a Time-Delay Neural Network for their use in Speech Decoding. The main characteristics of the Integrated Device are its simplicity to program and implement Inner Products, and its capability to work in Real Time, facilitating the integration of a Speech Decoding Subsystem to be used in Speech Assesment Techniques for Computer-Aided Language Learning applications.

Full Paper

Bibliographic reference.  Rodellar, Victoria / Diaz, Antonio / Gallardo, Jose / Peinado, Virginia / Nieto, Victor / Gomez, Pedro (1994): "VLSI implementation of a robust hybrid parameter-extractor and neural network for speech decoding", In ICSLP-1994, 1327-1330.