5th International Conference on Spoken Language Processing

Sydney, Australia
November 30 - December 4, 1998

Vector Quantizer Acceleration for an Automatic Speech Recognition Application

Antonio J. Araujo (1), Vitor C. Pera (2), Marcio N. Souza (3)

(1) FEUP/INESC, Portugal
(2) FEUP, Portugal
(3) UFRJ, Brazil

For a real-time application of an automatic speech recognition system, hardware acceleration can be the key to reduce the execution time. Vector quantization is an important task that a recognizer based on discrete hidden Markov models must perform. Due to the amount of floating point operations executed, the vector quantizer is an excellent candidate to be accelerated by customized hardware. The design, implementation and obtained results of a hardware solution based on field programmable gate array devices are presented.

Full Paper

Bibliographic reference.  Araujo, Antonio J. / Pera, Vitor C. / Souza, Marcio N. (1998): "Vector quantizer acceleration for an automatic speech recognition application", In ICSLP-1998, paper 0319.