ISCA Archive Interspeech 2009
ISCA Archive Interspeech 2009

Parallelized viterbi processor for 5,000-word large-vocabulary real-time continuous speech recognition FPGA system

Tsuyoshi Fujinaga, Kazuo Miura, Hiroki Noguchi, Hiroshi Kawaguchi, Masahiko Yoshimoto

We propose a novel Viterbi processor for the large vocabulary real-time continuous speech recognition. This processor is built with multi Viterbi cores. Since each core can independently compute, these cores reduce the cycle times very efficiently. To verify the effect of utilizing multi cores, we implement a dual-core Viterbi processor in an FPGA and achieve 49% cycle-time reduction, compared to a single-core processor. Our proposed dual-core Viterbi processor achieves the 5,000-word real-time continuous speech recognition at 65.175 MHz. In addition, it is easy to implement scalable increases in the number of cores, which leads to achievement of the larger vocabulary.


doi: 10.21437/Interspeech.2009-452

Cite as: Fujinaga, T., Miura, K., Noguchi, H., Kawaguchi, H., Yoshimoto, M. (2009) Parallelized viterbi processor for 5,000-word large-vocabulary real-time continuous speech recognition FPGA system. Proc. Interspeech 2009, 1483-1486, doi: 10.21437/Interspeech.2009-452

@inproceedings{fujinaga09_interspeech,
  author={Tsuyoshi Fujinaga and Kazuo Miura and Hiroki Noguchi and Hiroshi Kawaguchi and Masahiko Yoshimoto},
  title={{Parallelized viterbi processor for 5,000-word large-vocabulary real-time continuous speech recognition FPGA system}},
  year=2009,
  booktitle={Proc. Interspeech 2009},
  pages={1483--1486},
  doi={10.21437/Interspeech.2009-452}
}