Recent progresses in hardware technology, especially multi-cores CPUs, offer new perspectives to accelerate software in parallelizing the computing process. But, it is still considered as a difficult task to parallelize the execution of an ASR system, as the different steps are usually sequential. This paper addresses some opportunities offered by parallelism for ASR system combination: the proposed approach consists in making these ASR systems exchange information during the decoding process, on the fly, whereas classical approach consists in only combining final outputs. This approach is particularly relevant for applications which need a very low latency response. This paper presents some preliminary results which show a 14% relative reduction in word error rate with a limited impact on the latency due to ASR system combination.
Index Terms: LVCSR system harnessing, driven decoding, local ROVER combination
Bibliographic reference. Bougares, Fethi / Rouvier, Mickael / Estève, Yannick / Linarès, Georges (2012): "Low latency combination of parallelized single-pass LVCSR systems", In INTERSPEECH-2012, 1031-1034.